ASIC Design / Verification Engineers

  • Anywhere

Not Disclosed by Recruiter

2 – 7 yrs

Programming & Design

static timing analysis| Timing closure| Backend| Business Executive| Design verification| System Executive| ASIC Design| VERA| System verilog| Front end

Gurgaon

IT Software – Embedded , EDA , VLSI , ASIC , Chip Design

Software Developer

Semiconductors, Electronics

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